![]() TV-Out and TV-In (require interface chips).2 DVI interfaces (require interface chips).Floating point frame buffer (including blending operations).All necessary things to support Pixel and Vertex Shaders 3.0, including dynamic branching in pixel and vertex processors, vertex texture fetch, etc.Support for special geometry rendering optimizations to accelerate shadow algorithms based on a stencil buffer (so called Ultra Shadow II Technology), particularly widely used in the Doom III engine.Support for a "double-sided" stencil buffer. ![]() Calculation and writing of up to 4 values of depth and stencil buffer per clock (no operations with color).Calculation, blending, and writing of up to 2 full (color, depth, stencil buffer) pixels per clock.3 vertex processors, each with a texture unit, without filtering selected values (discrete sampling).4 pixel processors, each with a texture unit with random floating point and integer filtering (anisotropy up to 16x).Advanced features of the system memory addressed via PCI Express to store the frame buffer, textures, and other information traditionally stored in local memory.Interface conversion into APG 8x using bidirectional PCI ExpressAGP bridge HIS.PCI Express16x bus interface integrated into the chip.FC packaging (flip-chip, without a metal cap). ![]()
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